| saHwDescrMainProcessor |
1.3.6.1.4.1.1429.78.4.1.8 |
| tipuma5Tc4800(11) value will represent TI chips 4800zdw, 4800zdwg, 4800zdwgu.
and original tipuma5(7)value will represent TI chips 4830zdw, 4830zdwg and 4830zdwgu |
| Status: current |
Access: read-only |
| OBJECT-TYPE |
|
|
|
| |
INTEGER |
bcm3349(1), bcm3349kfb(2), bcm3368(3), bcm3381A1(4), bcm3381A2(5), bcm3349ipbg(6), tipuma5(7), bcm3361(8), bcm3378(9), bcm3380(10), tipuma5Tc4800(11), bcm3382(12), bcm3371(13), bcm3379(14), bcm3383(15), puma6(16), puma6MG(17), bcm33843Z(18), puma6-B2(19), puma6MG-B2(20), bcm3384(21), bcm33843E(22), bcm3385(23), puma6-D(24), puma6MG-D(25), bcm3384ZU(26) |
|
| saHwDescrMemoryMain |
1.3.6.1.4.1.1429.78.4.1.11 |
| Tok_String |
| Status: current |
Access: read-only |
| OBJECT-TYPE |
|
|
|
| |
INTEGER |
|
|
| saHwDescrWirelessChip |
1.3.6.1.4.1.1429.78.4.1.14 |
| Wireless chip hardware configuration.
SP stands for Standard Power
HP stands for High Power
For two-chip configurations, the chip on the left is 2.4GHz, the other is 5 GHz.
The following chips are dual-band capable: 4331, 43224, 43228.
The following chips are 5GHz capable: 4360.
The following chips support up to 3x3: 9380, 9580, 9381, 4331.
The following chips support up to 2x2: 43224, 43225, 43217, 43228. |
| Status: current |
Access: read-only |
| OBJECT-TYPE |
|
|
|
| |
INTEGER |
none(0), bcm4306(1), bcm4318(2), bcm4318E(3), bcm4322(4), bcm43224-dualBand(5), bcm43225-singleBand(6), bcm4313(7), bcm43217(8), bcm43228(9), bcm43217sp-bcm43228sp(10), ath9380(11), ath9580(12), ath9381sp-ath9580sp(13), bcm43228sp-5ghz(14), bcm4331sp(15), bcm43217sp-bcm4331sp(16), bcm4331sp-bcm4331sp(17), bcm43217sp-bcm4360sp(18), bcm4331sp-bcm4360hp(19), bcm43217hp(20), bcm43228hp(21), bcm43217-bcm4360hp(22), bcm43217hp-bcm4331sp(23), bcm43217hp-bcm4360sp(24), bcm4331hp-bcm43217sp(25), bcm4331hp-bcm43228sp(26), bcm4331hp-bcm4331sp(27), bcm4331hp-bcm4331hp(28), bcm4331hp-bcm4360sp(29), bcm4331hp-bcm4360hp(30), ath9381sp-qca9880(31), bcm43228hp-5ghz(32), clr240-cl2330(33) |
|
