ARRIS-D5-QAM-POST-MIB
File:
ARRIS-D5-QAM-POST-MIB.mib (15619 bytes)
Imported modules
Imported symbols
Defined Types
D5QamMemoryTestEntry |
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SEQUENCE |
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d5QamMemoryTestSlotId |
Unsigned32 |
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d5QamMemoryTestBankId |
Unsigned32 |
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d5QamMemoryTestDescription |
DisplayString |
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d5QamMemoryTestChip |
INTEGER |
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d5QamMemoryTestExecute |
INTEGER |
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d5QamMemoryTestResultVector |
Unsigned32 |
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d5QamMemoryTestResultRegister |
Unsigned32 |
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d5QamMemoryTestResultAddress |
Unsigned32 |
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D5QamRS232Entry |
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SEQUENCE |
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d5QamRS232SlotId |
Unsigned32 |
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d5QamRS232Status |
Unsigned32 |
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d5QamRS232Data |
OCTET STRING |
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D5QamECLEntry |
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SEQUENCE |
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d5QamECLSlotId |
Unsigned32 |
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d5QamECLAddress |
Unsigned32 |
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d5QamECLValue |
Unsigned32 |
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d5QamECLExecute |
INTEGER |
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D5QamConfigurationControlEntry |
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SEQUENCE |
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d5QamConfigurationControlSlotId |
Unsigned32 |
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d5QamConfigurationControlResetNow |
TruthValue |
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d5QamConfigurationControlManufacturingTests |
TruthValue |
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d5QamConfigurationControlPreDistortionCoefs |
TruthValue |
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Defined Values
d5QamPOSTMib |
1.3.6.1.4.1.4115.1.8.1.5.2 |
Arris D5 UEQ QAM Manufacturing MIB |
MODULE-IDENTITY |
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d5QamMemoryTestTable |
1.3.6.1.4.1.4115.1.8.1.5.2.1 |
This table contains a list of QAM POST tests and test-results for
each of the memory banks |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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SEQUENCE OF |
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D5QamMemoryTestEntry |
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d5QamMemoryTestEntry |
1.3.6.1.4.1.4115.1.8.1.5.2.1.1 |
An entry for a single memory bank POST test and result. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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D5QamMemoryTestEntry |
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d5QamMemoryTestSlotId |
1.3.6.1.4.1.4115.1.8.1.5.2.1.1.1 |
QAM card associated with a particular test. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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Unsigned32 |
1..6 |
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d5QamMemoryTestBankId |
1.3.6.1.4.1.4115.1.8.1.5.2.1.1.2 |
A unique identifier specifying a particular memory bank. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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Unsigned32 |
1..4 |
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d5QamMemoryTestChip |
1.3.6.1.4.1.4115.1.8.1.5.2.1.1.4 |
Select a particular chip for a DVT test, this field
is ignored for all other tests |
Status: current |
Access: read-write |
OBJECT-TYPE |
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INTEGER |
chip1(1), chip2(2) |
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d5QamMemoryTestExecute |
1.3.6.1.4.1.4115.1.8.1.5.2.1.1.5 |
Control for starting a test and checking for test completion.
Only a value of stop or startXXX is allowed on write access.
Only a value of idle or running is allowed on read access. |
Status: current |
Access: read-write |
OBJECT-TYPE |
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INTEGER |
idle(1), running(2), stop(3), startDataPinTest(4), startAddressPinTest(5), startMemorySweepTest(6), startDVTWriteCycles(7), startDVTReadCycles(8) |
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d5QamRS232Table |
1.3.6.1.4.1.4115.1.8.1.5.2.2 |
This table allow access to RS232 bus of available QAM cards |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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SEQUENCE OF |
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D5QamRS232Entry |
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d5QamRS232Entry |
1.3.6.1.4.1.4115.1.8.1.5.2.2.1 |
An entry for a single QAM card RS232 bus. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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D5QamRS232Entry |
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d5QamRS232SlotId |
1.3.6.1.4.1.4115.1.8.1.5.2.2.1.1 |
Slot associated with a particular QAM card. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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Unsigned32 |
1..6 |
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d5QamRS232Status |
1.3.6.1.4.1.4115.1.8.1.5.2.2.1.2 |
Retrieve the status of the RS232 bus as documented in
D5 Mux & PHY FPGAs Firmware Interface Specification section [2.4.14] |
Status: current |
Access: read-only |
OBJECT-TYPE |
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Unsigned32 |
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d5QamRS232Data |
1.3.6.1.4.1.4115.1.8.1.5.2.2.1.3 |
On writing, the octet string is pushed to the RS232 transmit FIFO
and flushed to the QAM micro-controller.
On reading, the octet string contains the content of the RS232
receive FIFO. |
Status: current |
Access: read-write |
OBJECT-TYPE |
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OCTET STRING |
Size(0..64) |
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d5QamECLTable |
1.3.6.1.4.1.4115.1.8.1.5.2.3 |
This table allow access to ECL bus of available QAM cards |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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SEQUENCE OF |
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D5QamECLEntry |
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d5QamECLEntry |
1.3.6.1.4.1.4115.1.8.1.5.2.3.1 |
An entry for a single QAM card ECL bus. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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D5QamECLEntry |
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d5QamECLSlotId |
1.3.6.1.4.1.4115.1.8.1.5.2.3.1.1 |
Slot associated with a particular QAM card. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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Unsigned32 |
1..6 |
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d5QamECLAddress |
1.3.6.1.4.1.4115.1.8.1.5.2.3.1.2 |
the ECL address for the transaction |
Status: current |
Access: read-write |
OBJECT-TYPE |
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Unsigned32 |
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d5QamECLValue |
1.3.6.1.4.1.4115.1.8.1.5.2.3.1.3 |
The ECL value for the write transaction, or the result of a
Read transaction. |
Status: current |
Access: read-write |
OBJECT-TYPE |
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Unsigned32 |
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d5QamECLExecute |
1.3.6.1.4.1.4115.1.8.1.5.2.3.1.4 |
Control for an ECL transaction.
Only a value of read or write is allowed on write access.
Only a value of idle, running or fail is allowed on read access. |
Status: current |
Access: read-write |
OBJECT-TYPE |
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INTEGER |
idle(1), fail(2), readFpga(3), writeFpga(4), readMicro(5), writeMicro(6) |
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d5QamConfigurationControlEntry |
1.3.6.1.4.1.4115.1.8.1.5.2.4.1 |
An entry for a single QAM card configuration. |
Status: current |
Access: not-accessible |
OBJECT-TYPE |
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D5QamConfigurationControlEntry |
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d5QamConfigurationControlResetNow |
1.3.6.1.4.1.4115.1.8.1.5.2.4.1.2 |
Setting this object to true(1) causes the device to reset.
Reading this object always returns false(2). |
Status: current |
Access: read-write |
OBJECT-TYPE |
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TruthValue |
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d5QamPOSTGroups |
1.3.6.1.4.1.4115.1.8.1.5.2.99.1 |
OBJECT IDENTIFIER |
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d5QamPOSTGroup |
1.3.6.1.4.1.4115.1.8.1.5.2.99.1.1 |
Description. |
Status: current |
Access: read-write |
OBJECT-GROUP |
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d5QamPOSTCompliances |
1.3.6.1.4.1.4115.1.8.1.5.2.99.2 |
OBJECT IDENTIFIER |
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d5QamPOSTCompliance |
1.3.6.1.4.1.4115.1.8.1.5.2.99.2.1 |
Description. |
Status: current |
Access: read-write |
MODULE-COMPLIANCE |
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